Design Verification Engineer

We have an exciting opportunity for a Design Verification Engineer in Krakow, Poland

Job Title: Design Verification Engineer
Location: Krakow, Poland (On-site)

I’m currently hiring for aDesign Verification Engineer role in Krakow, and I think it could be a strong match based on your background.

This is a company working at the heart of semiconductor innovation, helping teams design and integrate complexSoCs used across smartphones, EVs, smart devices, drones, satellites, and cloud datacentres, essentially the technology powering modern computing everywhere.

• Work on advancedSoC assembly and register generation flows
• Influence verification, tooling, and methodology in a highly technical EDA environment
• Contribute to technologies used across automotive, consumer electronics, AI, and high-performance computing

• Develop and executesimulation-based verification for a Register Bank compiler (Cadence, Synopsys, Siemens tools)
• BuildPython-based validation flows (IP-XACT, C headers, documentation)
• EnhanceCI pipelines, automation, and verification metrics
• Collaborate with developers on testing strategies and participate in code reviews

• 7+ years RTL/DV experience
• StrongSystemVerilog + UVM expertise
• SolidPython scripting skills
• Understanding ofVHDL/Verilog
• Experience withIP-XACT / C-HAL / equivalence checking (nice to have)
• Curious, autonomous, and quality-driven mindset

• Permanent role with acompetitive, negotiable salary
• Strong technical ownership and impact on methodology
• Collaborative, engineering-driven environment